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VNUHCM Journal of

Science and Technology Development

An official journal of Viet Nam National University Ho Chi Minh City, Viet Nam since 1997

ISSN: 1859-0128
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Engineering and Technology - Research article Open Access Logo

Applying 2-way Superscalar Technique to a 32-bit RISC Microprocessor

Quynh Ngoc Do 1, *
Hoang Nguyen Thanh Hau 1

  1. Integrated Circuit Design Research and Education Center
Correspondence to: Quynh Ngoc Do, Integrated Circuit Design Research and Education Center. Email: pvphuc@vnuhcm.edu.vn.
Volume & Issue: Vol. 16 No. 4 (2013) | Page No.: 33-42 | DOI: 10.32508/stdj.v16i4.1582
Published: 2013-12-31

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Copyright © 2013 by the author(s).

Copyright The Author(s) 2023. This article is published with open access by Vietnam National University, Ho Chi Minh city, Vietnam. This article is distributed under the terms of the Creative Commons Attribution License (CC-BY 4.0) which permits any use, distribution, and reproduction in any medium, provided the original author(s) and the source are credited. 

Abstract

In one-way microprocessor, the program code is executed at the maximum (ideal) rate of one instruction per cycle. In practice, due to the occurrence of branch instruction, this rate is less than 1. Superscalar architecture, when applied to a 32-bit RISC microprocessor, enables the handling of two instructions in a single machine cycle. To further increase the processing speed, the out-of-order execution is also applied to process an instruction that its operands are ready. As a result, the microprocessor which can complete two instructions per cycle is obtained.

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