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DESIGNING A SOPC FOR REAL - TIME IMAGE PROCESSING APPLICATIONS

Huynh Huu Thuan 1
Dinh Quang Hai 1
Cao Tran Bao Thuong 1
Nguyen Huu Phuong 1
Volume & Issue: Vol. 11 No. 12 (2008) | Page No.: 16-25 | DOI: 10.32508/stdj.v11i12.2711
Published: 2008-12-31

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Copyright The Author(s) 2023. This article is published with open access by Vietnam National University, Ho Chi Minh city, Vietnam. This article is distributed under the terms of the Creative Commons Attribution License (CC-BY 4.0) which permits any use, distribution, and reproduction in any medium, provided the original author(s) and the source are credited. 

Abstract

This paper presents our design of a System On a Programmable Chip (SoPC) for real - time image processing applications. To do this, some accelerators are designed and integrated into a FPGA chip in order to process data at a high speed. Besides, special techniques (such as DMA, multiple Maters…) are also used to speed up the system. The result is tested on a DSP Development Kit using FPGA Stratix II EP2S60F1020C4 of Altera Corporation. SoPC Builder, NIOS II IDE and Modesim are used for testing and integrating hardware/software.

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