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Abstract

FPGA device is a dominant implementation medium for digital circuits. Unfortunately, they do not support asynchronous circuits because of the lack of asynchronous circuit elements such as Muller gates, etc. In this paper, new efficient approaches are proposed to prototype asynchronous circuits on Look-Up Table-based (LUT) FPGA rapidly. The developed techniques are based on building of elements which play an important role in asynchronous circuits. The hazard-free elements are predefined in libraries in HDL and EDIF format. Timing and/or area constraints for place&route tool are automatically generated to map the asynchronous elements on suitable FPGA’s logic blocks. Several FPGA devices such as Altera, Xilinx and Actel could be used as target for the implementation.



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Article Details

Issue: Vol 14 No 4 (2011)
Page No.: 24-33
Published: Dec 30, 2011
Section: Engineering and Technology - Research article
DOI: https://doi.org/10.32508/stdj.v14i4.2004

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Creative Commons License

Copyright: The Authors. This is an open access article distributed under the terms of the Creative Commons Attribution License CC-BY 4.0., which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.

 How to Cite
Dinh, V. (2011). METHOD FOR IMPLEMENTING ASYNCHRONOUS CIRCUITS ON FPGA. Science and Technology Development Journal, 14(4), 24-33. https://doi.org/https://doi.org/10.32508/stdj.v14i4.2004

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