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Abstract
In one-way microprocessor, the program code is executed at the maximum (ideal) rate of one instruction per cycle. In practice, due to the occurrence of branch instruction, this rate is less than 1. Superscalar architecture, when applied to a 32-bit RISC microprocessor, enables the handling of two instructions in a single machine cycle. To further increase the processing speed, the out-of-order execution is also applied to process an instruction that its operands are ready. As a result, the microprocessor which can complete two instructions per cycle is obtained.
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Article Details
Issue: Vol 16 No 4 (2013)
Page No.: 33-42
Published: Dec 31, 2013
Section: Engineering and Technology - Research article
DOI: https://doi.org/10.32508/stdj.v16i4.1582
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Copyright: The Authors. This is an open access article distributed under the terms of the Creative Commons Attribution License CC-BY 4.0., which permits unrestricted use, distribution, and reproduction in any medium, provided the original author and source are credited.
How to Cite
Do, Q., & Hau, H. (2013). Applying 2-way Superscalar Technique to a 32-bit RISC Microprocessor. Science and Technology Development Journal, 16(4), 33-42. https://doi.org/https://doi.org/10.32508/stdj.v16i4.1582
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