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Abstract
This paper presents our design of a System On a Programmable Chip (SoPC) for real - time image processing applications. To do this, some accelerators are designed and integrated into a FPGA chip in order to process data at a high speed. Besides, special techniques (such as DMA, multiple Maters…) are also used to speed up the system. The result is tested on a DSP Development Kit using FPGA Stratix II EP2S60F1020C4 of Altera Corporation. SoPC Builder, NIOS II IDE and Modesim are used for testing and integrating hardware/software.
Issue: Vol 11 No 12 (2008)
Page No.: 16-25
Published: Dec 31, 2008
Section: Engineering and Technology - Research article
DOI: https://doi.org/10.32508/stdj.v11i12.2711
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