DESIGN OF INSTRUCTION SET AND CORE ARCHITECTURE FOR A FIXED-POINT 16-BIT DSP

Abstract

Today, Digital Signal Processors (DSP) are used widely in pratical applications and scientific research. Designing and manufacturing DSPs are beyond our technological level. However, with the appearance of programmable logic devices, such work becomes possible. The project is to design the instruction set and core architecture of a 16-bit DSP and then implemented on a FPGA as a logic environment [1], using Verilog HDL programming language. The DSP in this paper cannot compare with real DSPs on the market, but for us this is a step for more advanced designs.